■Low power 1.8V CMOS design
■7mm x 7mm/72pin/0.65mm pitch/TFBGA package applicable to non-HDI PCB.
■Wide dot clock range, 10-174MHz, suited for
TV Signal: up to 1080p(74.25MHz dual)
PC Signal: up to 1920x1440(86MHz dual)
■Supports 1.8V single power supply
■1.8V/2.5V/3.3V TTL/CMOS inputs are supported by setting IOVCC=1.8V/2.5V/3.3V
■LVDS swing reducible by RS-pin to reduce both EMI and power consumption
■PLL requires No external components
■Flexible Input/Output mode
1.Single in / Dual LVDS out
2.Single in / Single LVDS out
3.Double edge Single in / Dual LVDS out
■2 LVDS data mapping to simplify PCB layout
■Power down mode
■Input clock triggering edge selectable by R/F pin
■6bit / 8bit modes selectable by 6B/8B pin