■49pin 0.65mm pitch VFBGA Package
■Wide dot clock range: 8-160MHz suited for
TV Signal : NTSC(12.27MHz) - 1080p(148.5MHz)
PC Signal : QVGA(8MHz) - WUXGA(154MHz)
■1.2V to 3.3V CMOS inputs are supported.
■LVDS swing is reducible by RS-pin to reduce EMI and power consumption.
■PLL requires no external components.
■On chip jitter filtering.
■Spread Spectrum Clock input tolerant.
■Power down mode.
■Input clock triggering edge is selectable by R/F-pin.
■Operates from a Single 3.3V Supply and 110mW(typ.) at 75MHz.